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HT93LC46
1K 3-Wire CMOS Serial EEPROM
Features
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*
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Operating voltage VCC - Read: 2.0V~5.5V - Write: 2.4V~5.5V Low power consumption - Operating: 5mA max. - Standby: 10A max. User selectable internal organization - 1K(HT93LC46): 128x8 or 64x16 3-wire Serial Interface Write cycle time: 2ms max.
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Automatic erase-before-write operation Word/chip erase and write operation Write operation with built-in timer Software controlled write protection 10-year data retention after 100K rewrite cycles 106 rewrite cycles per word 8-pin DIP/SOP package Commercial temperature range (0C to +70C)
General Description
The HT93LC46 is a 1K-bit low voltage nonvolatile, serial electrically erasable programmable read only memory device using the CMOS floating gate process. Its 1024 bits of memory are organized into 64 words of 16 bits each when the ORG pin is connected to VCC or organized into 128 words of 8 bits each when it is tied to VSS. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. By popular microcontroller, the versatile serial interface including chip select (CS), serial clock (SK), data input (DI) and data output (DO) can be easily controlled.
Block Diagram
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Pin Assignment
Pin Description
Pin Name
CS SK DI DO VSS ORG NC VCC
I/O
I I I O I I -- I Chip select input Serial clock input Serial data input Serial data output Negative power supply Internal Organization No connection Positive power supply
Description
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Absolute Maximum Ratings
Operation Temperature (Commercial) ....................................................................................0C to 70C Applied VCC Voltage with Respect to VSS .......................................................................... -0.3V to 6.0V Applied Voltage on any Pin with Respect to VSS.............................................................. VSS-0.3V to VCC+0.3V Supply READ Voltage................................................................................................................ 2V to 5.5V Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute Maximum Ratings" may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Symbol
VCC ICC1
Parameter
Operating Voltage Operating Current (TTL) Operating Current (CMOS) Standby Current (CMOS) Input Leakage Current Output Leakage Current Input Low Voltage
Test Conditions VCC
-- 5V 5V 2~5.5V 5V 5V 5V 5V 2~5.5V 5V 2~5.5V 5V
Conditions
Read Write DO unload, SK=1MHz DO unload, SK=1MHz DO unload, SK=250kHz CS=SK=DI=0V VIN=VSS~VCC VOUT=VSS~VCC CS=0V -- -- -- -- IOL=2.1mA IOH=-400A VIN=0V, f=250kHz VOUT=0V, f=250kHz
Min.
2.0 2.4 -- -- -- -- 0 0 0 0 2 0.9VCC -- -- 2.4 VCC-0.2 -- --
Typ.
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
Max.
5.5 5.5 5 5 5 10 1 1 0.8 0.1VCC VCC VCC 0.4 0.2 -- -- 5 5
Unit
V V mA mA mA
A A A
ICC2
ISTB ILI ILO VIL VIH VOL VOH CIN COUT
V V V V V V V V pF pF
Input High Voltage
Output Low Voltage
2~5.5V IOL=10A 5V 2~5.5V IOH=-10A -- --
Output High Voltage Input Capacitance Output Capacitance
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A.C. Characteristics
Symbol
fSK tSKH tSKL tCSS tCSH tCDS tDIS tDIH tPD1 tPD0 tSV tHV tPR
Parameter
Clock Frequency SK High Time SK Low Time CS Setup Time CS Hold Time CS Deselect Time DI Setup Time DI Hold Time DO Delay to "1" DO Delay to "0" Status Valid Time DO Disable Time Write Cycle Time
VCC=5V10% Min.
0 250 250 50 0 250 100 100 -- -- -- 100 --
VCC=3V10% Min.
0 1000 1000 200 0 250 200 200 -- -- -- 400 --
VCC=2V* Min.
0 2000 2000 200 0 1000 400 400 -- -- -- 400 --
Unit
kHz ns ns ns ns ns ns ns ns ns ns ns ms
Max.
2000 -- -- -- -- -- -- -- 250 250 250 -- 2
Max.
500 -- -- -- -- -- -- -- 1000 1000 250 -- 2
Max.
250 -- -- -- -- -- -- -- 2000 2000 -- -- --
* For Read Operating Only
A.C. test conditions
Input rise and fall time: 5ns (1V to 2V) Input and output timing reference levels: 1.5V Output load: See Figure right
Output load circuit
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Timing Diagrams
Functional Description
The HT93LC46 is accessed via a three-wire serial communication interface. The device is arranged into 64 words by 16 bits or 128 words by 8 bits depending whether the ORG pin is connected to VCC or VSS. The HT93LC46 contains seven instructions: READ, ERASE, WRITE, EWEN, EWDS, ERAL and WRAL. When the user selectable internal organization is arranged into 64x16 (128x8), these instructions are all made up of 9(10) bits data: 1 start bit, 2 op code bits and 6(7) address bits. By using the control signal CS, SK and data input signal DI, these instructions can be given to the HT93LC46. These serial instruction data presented at the DI input will be written into the device at the rising edge of SK. During the READ cycle, DO pin acts as the data output and during the WRITE or ERASE cycle, DO pin indicates the BUSY/READY status. When the DO pin is active for read data or as a BUSY/READY indicator the CS pin must be high; otherwise DO pin will be in a high-impedance state. For successful instructions, CS must be low once after the instruction is sent. After power on, the device is by default in the EWDS state. And, an EWEN instruction must be performed before any ERASE or WRITE instruction can be executed. The following are the functional descriptions and timing diagrams of all seven instructions.
READ
The READ instruction will stream out data at a specified address on the DO pin. The data on DO pin changes during the low-to-high edge of SK signal. The 8 bits or 16 bits data stream is preceded by a logical "0" dummy bit. Irrespective of the condition of the EWEN or EWDS instruction, the READ command is always valid and independent of these two instructions. After the data word has been read the internal address will be automatically incremented by 1 allowing the next consecutive data word to be read out without entering further address data. The address will wrap around with CS High until CS returns to LOW.
EWEN/EWDS
The EWEN/EWDS instruction will enable or disable the programming capabilities. At both the power on and power off state the device automatically entered the disable mode. Before a WRITE, ERASE, WRAL or ERAL instruction is given, the programming enable instruction EWEN must be issued, otherwise the ERASE/WRITE instruction is invalid. After the EWEN instruction is issued, the programming enable condition remains until power is turned off or a EWDS instruction is given. No data can be written into the device in the programming disabled state. By so doing, the internal memory data can be protected.
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ERASE ERAL
The ERASE instruction erases data at the specified addresses in the programming enable mode. After the ERASE op-code and the specified address have been issued, the data erase is activated by the falling edge of CS. Since the internal auto-timing generator provides all timing signals for the internal erase, so the SK clock is not required. During the internal erase, we can verify the busy/ready status if CS is high. The DO pin will remain low but when the operation is over, the DO pin will return to high and further instructions can be executed.
WRITE
The ERAL instruction erases the entire 64x16 or 128x8 memory cells to logical "1" state in the programming enable mode. After the erase-all instruction set has been issued, the data erase feature is activated by the falling edge of CS. Since the internal auto-timing generator provides all timing signal for the erase-all operation, so the SK clock is not required. During the internal erase-all operation, we can verify the busy/ready status if CS is high. The DO pin will remain low but when the operation is over, the DO pin will return to high and further instruction can be executed.
WRAL
The WRITE instruction writes data into the device at the specified addresses in the programming enable mode. After the WRITE opcode and the specified address and data have been issued, the data writing is activated by the falling edge of CS. Since the internal auto-timing generator provides all timing signal for the internal writing, so the SK clock is not required. The auto-timing write cycle includes an automatic erase-before-write capability. So, it is not necessary to erase data before the WRITE instruction. During the internal writing, we can verify the busy/ready status if CS is high. The DO pin will remain low but when the operation is over, the DO pin will return to high and further instructions can be executed.
The WRAL instruction writes data into the entire 64x16 or 128x8 memory cells in the programming enable mode. After the write-all instruction set has been issued, the data writing is activated by the falling edge of CS. Since the internal auto-timing generator provides all timing signals for the write-all operation, so the SK clock is not required. During the internal write-all operation, we can verify the busy/ready status if CS is high. The DO pin will remain low but when the operation is over the DO pin will return to high and further instruction can be executed.
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Timing Diagrams
READ
EWEN/EWDS
WRITE
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ERASE
ERAL
WRAL
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Instruction Set Summary
HT93LC46
Instruction
READ ERASE WRITE EWEN EWDS ERAL WRAL
Comments
Read data Erase data Write data Erase/Write Enable Erase/Write Disable Erase All Write All
Start Op bit Code
1 1 1 1 1 1 1 10 11 01 00 00 00 00
Address ORG=0 ORG=1 X8 X16
A6~A0 A6~A0 A6~A0 A5~A0 A5~A0 A5~A0
Data ORG=0 ORG=1 X8 X16
D7~D0 D15~D0 -- D7~D0 D15~D0 -- -- -- D7~D0 D15~D0
11XXXXX 11XXXX 00XXXXX 00XXXX 10XXXXX 10XXXX 01XXXXX 01XXXX
Note: X stands for "don't care"
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Holtek Semiconductor Inc. (Headquarters) No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C. Tel: 886-3-563-1999 Fax: 886-3-563-1189 Holtek Semiconductor Inc. (Taipei Office) 5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C. Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Microelectronics Enterprises Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Copyright (c) 1999 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
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